Sections
Left Column
Text Area
| Name | Graduation | Thesis Title |
|---|---|---|
|
Annan XIONG |
Aug.2025 | Time-of-Flight Technology for Scalable Depth Sensing: From Device to System-Level Intelligence |
|
Shun Qi DAI |
Aug.2023 | Photonic Demodulator for Time-of-Flight Image Sensor |
|
Jiaona ZHANG |
Aug.2023 | Flexible Electronics Based on a-IGZO Transistors |
|
Cristine Jin Delos Santos ESTRADA |
Aug.2023 | Two-Dimensional Materials-Based FET Technology: From Fabrication, Device Modeling, to Circuit Simulation |
|
Yuqing ZHANG |
Aug.2023 | Down-Scaling Self-Aligned Top-Gate Amorphous Oxide Thin-Film Transistors into Nanometer Scale |
| Clarissa Cyrilla Prawoto | Jan. 2022 | A Design Methodology for Inductors, Transformers and Baluns |
| Wei-Chih CHENG | Aug. 2021 | Technological Developments in Pursuit of Recess-Free Normally-OFF AlGaN/GaN HEMTs |
| Zichao MA | Aug. 2020 | Complementary MoS2 Field-Effect Transistor Technology |
| Ying XIAO | Aug. 2020 | Ultralow-k Interconnect Dielectric with Structured Pores |
| Xintong ZHANG | Jun. 2018 | Contact Engineering by 2D Graphene Film |
| Suwen LI | Jul. 2017 | CMOS-Compatible Carbon Nanotube Via Technology |
| Zubair AHMED | Aug. 2016 | Modeling Carbon Nanotube (CNT) Distribution Variations in CNTFETs |
| Yihan CHEN | Aug. 2016 | Modeling Interface Engineered Phase-Change Memory Cell |
| Salahuddin RAJU | Aug. 2016 | Integration of Low Loss Interconnects in CMOS |
| Shairfe Muhammad SALAHUDDIN | Aug. 2016 | Low-Power Embedded Memory Circuits in Nano-Scale CMOS Technologies |
| Khawar SARFRAZ | Aug. 2016 | Power Efficient Cache Memories with Wide Operating Voltage Range |
| Lining ZHANG | Aug. 2013 | Developing the Compact Models and i-MOS platform for the Tunneling Field-Effect Transistor Technology |
| Henry Kit-Chun KWONG | Aug. 2012 | Phase Change Memory Model Development Based on Cell Geometry |
| Lin LI | Jan. 2012 | Phase-Change Memory on Thin-Film-Transistor Technology for System-on-Panel Applications |
| Jessica Ka-Yan Law | Aug. 2011 | The Application of Microelectrode Array Technology to Biomedical Research |
| Tzs-Yin MAN | Jan. 2008 | Low Power Circuit Techniques for Power Converters in Battery Powered Mobile Systems |
| Xinnan LIN | Aug. 2007 | Double-Gate MOSFET Technology and Applications |
| Wen WU | Aug. 2007 | Modeling the Extrinsic Resistance and Capacitance of Planar and Non-Planar MOSFETs |
| Wai-Kit LEE | Apr. 2006 | Modeling the distributed RC effects of BiCMOS technology at high frequency operations |
| Kevin WU | Dec. 2005 | Three Dimensional Multi-Gate Devices and Circuits Fabrication, Characterization, and modeling |
| Zhikuan ZHANG | Mar. 2005 | Source/Drain Engineering for Extremely Scaled MOSFETs |
| Alain CHAN | Mar. 2005 | A Study on the Scaling of sub-100nm Non-Volatile Memory |
| Lawrence CHENG | Oct. 2004 | Modeling of Polysilicon Thin-Film Transistors Formed by Grain Enhancement Technology - Metal-Induced Lateral Crystallization |
| Chen XU | May 2004 | Low Voltage CMOS Digital Imaging Architecture with Device Scaling Consideration |
| Jagar SINGH | Jul. 2002 | Technology, Characteristics and Modeling of Large-grain Polysilicon MOSFET |
| Matthew ZHANG | Jan. 2000 | High Gain CMOS Image Sensor Design and Fabrication on SOI and Bulk Technology |
| Samual FUNG | Dec. 1997 | Thin-film SOI MOSFET's Device Physics, Characterization and Circuit Modeling |
Right Column